This thesis presents various studies towards the connection between both growth and processing conditions round the) the electrical characteristics of interfaces within the CdTe solar energy, and b) the photovoltaic (PV) performance. Annealing within the CdS/TCO (transparent conductive oxide) bilayer in oxidising and reducing ambients was investigated to be able to study adjustments to the electrical characteristics within the In/CdS/TCO structure. It had been found that publish-growth oxidising altered the current–voltage (J-V) characteristics from Ohmic to rectifying, that was connected with the development of a CdO-n+/CdS-n junction, just as one oxygen-wealthy layer was revealed by Auger electron spectroscopy (AES) across the CdS surface. A totally new approach to testing pinholing within the CdS film was applied, which gave confidence the observed Ohmic conduct was genuine.
Annealing CdS (in many ambients) was further investigated by studying its impact on full devices, nonetheless the result on PV performance was minor. These studies was along with an analysis in a rapid screening approach to optimising CdTe/CdS cell PV performance, which reduced the amount of the right samples getting an issue of
30. It absolutely was achieved by different the CdTe thickness by chemically bevelling cells within the Br2/methanol solution. The very best performance was acquired in the CdTe thickness of
3 m, the CdCl2 treatment used was optimum. Both uniformity and roughness within the cell layers are very important to acquiring top quality results employing this methodology.
The electrical current transport mechanism within the CdTe/CdS heterojunction was investigated as being a reason behind a) growth technique through which devices were fabricated, and b) window layer type.
Data were collected by recording J-V-T measurements in a number of light intensities (including dark), with temperature being varied out of all different 200 – 300 K. The transport mechanism was seen to become dependent only across the window material under forward bias condition when asleep, but was outdoors of both window layer and growth technique within the) forward bias within the light, and b) reverse bias when asleep. A totally new method was put on uncover the diode ideality element on the sunny day, and thus comprehend the transport mechanism.
A corner contact within the CdTe/CdS cell was investigated by calculating its barrier height (b). Within the preliminary study, two means of b measurement were compared, with relevant method becoming familiar with review Au, Sb2Te3 and As2Te3 contacts, while using the CdTe back surface being whether) as-grown, b) nitric/phosphoric acidity etched or c) plasma etched. The requirement of the barrier height for every contact that is effect on the cell performance are presented and discussed.